Journal Publications
Pallipuram, V.K., M.C. Smith, N. Raut, and X. Ren, “A Regression-Based Heterogeneous Performance Prediction Framework for GPGPU Clusters,” Concurrency and Computation: Practice and Experience, 26/2, pp. 27, (2014), DOI: 10.1002/cpe.3017.
Feltus, F.A., S.P. Ficklin, S.M. Gibson, and M.C. Smith, “Maximum Capture of an Organism’s Gene Co-Expression Space via Gene Interaction Layer Construction,” BMC Systems Biology, 7/44, pp. 12, (2013), DOI:10.1186/1752-0509-7-44.
Gibson, S.M., S.P. Ficklin, S. Isaacson, F. Luo, F.A. Feltus, and M.C. Smith, “Massive-Scale Gene Co-expression Network Construction and Robustness Testing using Random Matrix Theory,” PLoS ONE 8/2: e55871, pp. 33, (2013), DOI:10.1371/journal.pone.0055871.
Smith, M.C. and G.D. Peterson, “Optimization of Shared High-Performance Reconfigurable Computing Resources,” ACM Transactions on Embedded Computing Systems, 11/2, pp. 22, (2012), DOI 10.1145/2220336.2220348.
Stitt, G., A. George, H. Lam, M.C. Smith, V. Aggarwal, G. Wang, C. Reardon, B. Holland, S. Koehler, and J. Coole, “An End-to-End Tool Flow for FPGAAccelerated Scientific Computing,” Special Issue of IEEE Design and Test of Computers, Jul/Aug, pp. 68-77, (2011).
Holland, B., A.D. George, H. Lam, and M.C. Smith, “An Analytical Model for Hierarchical Performance Prediction of Multi-FPGA Systems,” ACM Transactions on Reconfigurable Technology and Systems (TRETS), 4/3, pp. 28, (2011), DOI: 10.1145/2000832.2000839.
Pallipuram, V.K., M.C. Smith, and M.A. Bhuiyan, “A Comparative Study of GPU Programming Models and Architectures,” Journal of Supercomputing, May, pp. 46, (2011), DOI: 10.1007/s11227-011-0631-3.
Bhuiyan, M.A., M.C. Smith, and V.K. Pallipuram, “Performance, Optimization and Fitness: Connecting Applications to Architectures,” Concurrency and Computation: Practice and Experience, 23/10, 1066–1100, (2011), DOI: 10.1002/cpe.1688.
Alam, S.R., P.K. Agarwal, J.S. Vetter, and M.C. Smith, “Throughput Improvement of Molecular Dynamics Simulations Using Reconfigurable Computing,” Scalable Computing: Practice and Experience – Scientific International Journal for Parallel and Distributed Computing, 8/4, 395-410, (2007).
Alam, S.R., P.K. Agarwal, M.C. Smith, J.S. Vetter, and D. Caliga, “Using FPGA Devices to Accelerate Biomolecular Simulations,” IEEE Computer, Vol. 40, No. 3, pp. 66-73, March 2007.
Smith, M.C. and G.D. Peterson, “Parallel Application Performance on Shared High Performance Reconfigurable Computing Resources,” Performance Evaluation: An International Journal, Special Issue on Performance Modeling and Evaluation of High-Performance Parallel and Distributed Systems, Vol. 60/1-4, pp. 107-125, May 2005.
Adler, S.S., M. Allen, G. Alley, R. Amirikas, Y. Arai, T.C. Awes, K.N. Barish, F. Barta, S. Batosouli, S. Belikov, M.J. Bennett, et. al., M. Smith, et. al., “PHENIX On-line Systems,” Nuclear Instruments and Methods in Physics Research Section A, Vol. 499, Iss. 2-3, pp. 560-592, March 2003.
Adcox, K., J. Ajitanand, J. Alexander, J. Barrette, R. Belkin, D. Borland, W.L. Bryan, R. du Rietz, K. El Chanawi, A. Cherlin, et. al., M. Smith, et. al., “Construction and Performance of the PHENIX Pad Chambers,” Nuclear Instruments and Methods in Physics Research Section A, A497, pp. 263-293, February 2003.
Nilsson, P., J. Barrette, W. Bryan, Z. Fraenkel, V. Green, S. Garpman, H.A. Gustafsson, U. Jagadish, et. al., M.C. Smith, et. al., “The Pixel Readout System for the PHENIX Pad Chambers,” Panic99 Nuclear Physics, A661, pp. 665-668, May 1999.
Smith, M.C., W.L. Bryan, D. Smith, U. Jagadish, D. McMilan, J. Walker, G.R. Young, A. Oskarsson, L. Osterman, V. Greene, and L. Nikkinen, “A Front-End Electronics Module for the PHENIX Pad Chamber,” IEEE Transactions on Nuclear Science, Vol. 46, No. 6, pp. 1998-2002, December 1999.
Ericson, M.N., M.D. Allen, J. Boissevain, C.L. Britton, M.S. Emery, S.F. Hahn, J.S. Kapustinsky, R.E. Lind, M.S. Musrock, J. Simon-Gillo, D.E. Smith, J.P. Sullivan, H. Van Hecke, G.R. Young, and M.C. Smith, “Front-End Module Readout and Control Electronics for the PHENIX Multiplicity Vertex Detector,” IEEE Transactions on Nuclear Science, Vol. 45, No. 3, pp. 833-837, June 1998.
Paulus, M.J., J.T. Mihalczo, T.E. Valentine, J.A. Mullens, J.E. Breeding, T. Uckan, J. Mattingly, G. Turner, M.C. Smith, and J.A. McEvers, “A Novel Method for Determining Pulse Counting Circuitry Dead Time Using the Nuclear Weapons Inspection System,” IEEE Transactions on Nuclear Science, Vol. 45, No. 3, pp. 710-714, June 1998.
Morrison, D.P., Y. Akiba, O. Alford, M. Allen, W. Allen, G. Alley, Y. Arai, J.B. Archuleta, J.R. Archuleta, S.H. Aronson, et. al., M.C. Smith, et. al., “The PHENIX Experiment at RHIC,” Nuclear Physics, A638, pp. 565-570, April 1998.
Britton, C.L., W.L. Bryan, M.S. Emery, M.N. Ericson, M.S. Musrock, M.L. Simpson, M.C. Smith, J.W. Walker, A.L. Wintenberg, G.R. Young, M.D. Allen, L.G. Clonts, R.L. Jones, E.J. Kennedy, R.S. Smith, et. al., “Design and Performance of Beam Test Electronics for the PHENIX Multiplicity Vertex Detector,” IEEE Transactions on Nuclear Science, Vol. 44, No. 3, pp. 283-288, June 1997.
Mihalczo, J.T., J.A. Mullens, J.E. Breeding, T.E. Valentine, V.K. Pare, D.E. McMillan, T.A. Gafford, R.R. Bentz, G.W. Turner, M.C. Smith, J.A. McEvers, J.K. Mattingly, R.I. Vandermolen, E.D. Blakeman, M.J. Paulus, and T. Uckan, “New Processor for Subcritical Fissile System Measurements for Nuclear Criticality Safety,” Transactions of American Nuclear Society, Vol. 75, pp. 178-179, 1996.
Conference Publications
Husain, B., K. Sapra, R.R. Brooks, and M.C. Smith, “Circumventing Keyloggers and Screendumps,” 8th International Conference on Malicious and Unwanted Software (Malware’13), Fajardo, Puerto Rico, USA, October 22-24, 2013.
Pallipuram, V.K., N. Raut, X. Ren, M.C. Smith, and S. Naik, “A Multi-Node GPU Implementation of Non-Linear Anisotropic Diffusion Filter,” SAAHPC’12, pp.8, July 10-12, 2012.
Goodall, T., S. Gibson, and M.C. Smith, “Parallelizing Principle Component Analysis for Robust Facial Recognition using CUDA,” SAAHPC’12, pp.4, July10-12-2012.
Raut, N., V.K. Pallipuram, X. Ren and M.C. Smith, “Exploring Multi-Level Parallelism in GPGPU clusters,” XSEDE’12 Annual Conference, Chicago, IL, July 16-19, 2012.
Pallipuram, V.K., M.C. Smith, N. Raut, and X. Ren, “Exploring Multi-level Parallelism for Large-scale Spiking Neural Networks,” The 18th International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’12), pp.7, July 16-19, 2012.
Pallipuram, V.K., M.A. Bhuiyan and M.C. Smith, “Evaluation of GPU Architectures Using Spiking Neural Networks,” in proceedings of the Symposium on Application Accelerators in High Performance Computing (SAAHPC’11), Knoxville, TN, pp. 10, July 19-20, 2011.
Bhuiyan, M.A., A. Nallamuthu, M.C. Smith and V.K. Pallipuram, “Optimization and Performance Study of Large-scale Biological Networks for Reconfigurable Computing,” in proceedings of the Fourth International Workshop on High-Performance Reconfigurable Computing Technology and Applications (HPRCTA’10), New Orleans, LA, pp. 9, November 14, 2010.
Nallamuthu, A., S. Hampton, M.C. Smith, S.R. Alam, P.K. Agarwal, “Energy Efficient Biomolecular Simulations with FPGA-based Reconfigurable Computing,” in proceedings of ACM Computing Frontiers, Bertinoro, Italy, pp. 8, May 17-19, 2010.
Bhuiyan, M.A., V.K. Pallipuram, M. C. Smith, and T. Taha, “Acceleration of Spiking Neural Networks in Emerging Multi-core and GPU Architectures,” Workshop on High Performance Computational Biology (HiCOMB) held in conjunction with IPDPS, Atlanta, GA, pp. 12, April 19-23, 2010.
Rice, K.L., M.A. Bhuiyan, T.M. Taha, C.N. Vutsinas, and M.C. Smith, “FPGA Implementation of Izhikevich Spiking Neural Networks for Character Recognition,” ReConFig 2009, Cancun, Mexico, pp. 6, December 2009.
Martin, P.M., M.C. Smith, S.R. Alam, and P.K. Agarwal, “Implementation Methodology for Emerging Reconfigurable Systems,” Midwestern Symposium on Circuits and Systems, Knoxville, TN, pp. 4, August 10-13, 2008.
Merchant, S.G., B.M. Holland, C. Reardon, A.D. George, H. Lam, G. Stitt, N. Alam, M.C. Smith, I. Gonzalez, E. El-Araby, P. Saha, T. El-Ghazawi, and H. Simmler, “Strategic Challenges for Application Development Productivity in Reconfigurable Computing,” 2008 IEEE National Aerospace and Electronics Conference, Dayton, Ohio, USA, pp. 10, July 16-18, 2008.
Gonzalez, I., E. El-Araby, P. Saha, T. El-Ghazawi, H. Simmler, S.G. Merchant, B.M. Holland, C. Reardon, A.D. George, H. Lam, G. Stitt, N. Alam, and M.C. Smith, “Classification of Application Development for FPGA-Based Systems,” 2008 IEEE National Aerospace and Electronics Conference, Dayton, Ohio, USA, pp. 10, July 16-18, 2008.
Kruzner, A., J. Merwin, D. Rollend, A. Nallamuthu, C. Gupta, and M.C. Smith, “Inquiry: Robust Facial Recognition with Reconfigurable Platforms,” Reconfigurable Systems Summer Institute, University of Illinois at Urbana-Champaign, pp.4, July 7-10, 2008.
S. Gibson, M.C. Smith, A. Nallamuthu, C. Gupta, D. Rollend, A. Kruzner, and J. Merwin, “Creative Inquiry: Parallel Implementation of Facial Recognition Algorithms,” to appear at Supercomputing 2008 South Carolina Computing Consortium Research Exhibit, Austin, TX, November 15-21, 2008.
Alam, N., M.C. Smith and M.E. Kurz, “Random Number Generation on FPGA-based Computing Systems in a Condor Environment,” to appear at Supercomputing 2008 South Carolina Computing Consortium Research Exhibit, Austin, TX, November 15-21, 2008.
Martin, P.M., M.C. Smith, S.R. Alam, and P.K. Agarwal, “Implementation Methodology for Emerging Reconfigurable Systems,” Midwestern Symposium on Circuits and Systems, Knoxville, TN, August 10-13, 2008.
Merchant, S.G., B.M. Holland, C. Reardon, A.D. George, H. Lam, G. Stitt, N. Alam, M.C. Smith, I. Gonzalez, E. El-Araby, P. Saha, T. El-Ghazawi, and H. Simmler, “Strategic Challenges for Application Development Productivity in Reconfigurable Computing,” 2008 IEEE National Aerospace and Electronics Conference, Dayton, Ohio, USA, July 16-18, 2008.
Gonzalez, I., E. El-Araby, P. Saha, T. El-Ghazawi, H. Simmler, S.G. Merchant, B.M. Holland, C. Reardon, A.D. George, H. Lam, G. Stitt, N. Alam, and M.C. Smith, “Classification of Application Development for FPGA-Based Systems,” 2008 IEEE National Aerospace and Electronics Conference, Dayton, Ohio, USA, July 16-18, 2008.
Kruzner, A., J. Merwin, D. Rollend, A. Nallamuthu, C. Gupta, and M.C. Smith, “Inquiry: Robust Facial Recognition with Reconfigurable Platforms,” Reconfigurable Systems Summer Institute, University of Illinois at Urbana- Champaign, July 7-10, 2008.
Martin, P.M., M.C. Smith, S.R. Alam, and P.K. Agarwal, “Advances in Reconfigurable Computing Technology Provide New Methods for Application Acceleration,” Supercomputing 2007 South Carolina Computing Consortium Research Exhibit, Reno, NV, November 10-16, 2007.
Smith, M.C. and G.D. Peterson, “Optimized Resource Usage for High- Performance Reconfigurable Computers,” Engineering of Reconfigurable Systems and Algorithms (ERSA’07), Las Vegas, Nevada, June 25-28, 2007.
Alam, S.R. and M.C. Smith, “An Application Specific Memory Characterization Technique for Co-processor Accelerators,” IEEE 18th International Conference on Application-specific Systems, Architectures and Processors (ASAP’07), Montréal, Québec, Canada, July 9-11, 2007.
Smith, M.C., J.S. Vetter, and S.R. Alam, “Investigation of Benchmark Suites for High-Performance Reconfigurable Computing Platforms,” submitted to The 9th annual Military & Aerospace Programmable Logic Device (MAPLD) International Conference, NASA Office of Logic Design, Washington D.C., September 26-28, 2006.
Smith, M.C., S.R. Alam, P. Agarwal, and J.S. Vetter, “A Task-based Development Model for Accelerating Large-Scale Scientific Applications on FPGA-based Reconfigurable Computing Platforms,” Reconfigurable Systems Summer Institute, RSSI’06, Champaign-Urbana, Illinois, July 10-14, 2006.
Storaasli, O., S. Alam and M. Smith, “Cray XD1 Experiences and Comparisons with other FPGA-based Supercomputer Systems,” Cray User Group (CUG) Conference, Ticino, Switzerland, May 8-11, 2006.
Subramaniyan, R. I. Troxel, A.D. George, and M.C. Smith, “Simulative Analysis of Dynamic Scheduling Heuristics for Reconfigurable Computing of Parallel Applications,” Fourteenth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA’06), Monterey, California, February 22-24, 2006.
Cordova, L., M.C. Smith, S.R. Alam, and J.S. Vetter, “High Performance Programming Model for Large-Scale Molecular Dynamics Calculations on Reconfigurable Supercomputers,” The 9th Annual Workshop on High Performance Embedded Computing (HPEC), MIT Lincoln Laboratory, Boston, Massachusetts, September 20-22, 2005.
Akella, S., M.C. Smith, S.R. Alam, R.T. Mills, R.F. Barrett, and J.S. Vetter, “Sparse Matrix-Vector Multiplication Kernel on a Reconfigurable Computer,” The 9th Annual Workshop on High Performance Embedded Computing (HPEC), MIT Lincoln Laboratory, Boston, Massachusetts, September 20-22, 2005.
Smith, M.C., J. Vetter, and S. Alam, “Scientific Computing Beyond CPUs: FPGA implementations of common scientific kernels,” The 8th annual Military & Aerospace Programmable Logic Device (MAPLD) International Conference, NASA Office of Logic Design, Washington D.C., September 7-9, 2005.
Liang, X., J. Vetter, M.C. Smith, and A. Bland, “Balancing FPGA Resource Utilities,” Engineering of Reconfigurable Systems and Algorithms (ERSA’05), Las Vegas, Nevada, June 27-30, 2005.
Smith, M.C., J. Vetter, and X. Liang, “Accelerating Scientific Applications with the SRC-6 Reconfigurable Computer: Methodologies and Analysis,” Reconfigurable Architectures Workshop (RAW’05), Denver, Colorado, April 4-5, 2005.
Smith, M.C. and G.D. Peterson, “Analytical Modeling for High Performance Reconfigurable Computers,” International Symposium on Performance Evaluation of Computer and Telecommunication Systems (SPECTS’02), San Diego, California, July 14-19, 2002.
Smith, M.C. and G.D. Peterson, “Programming High Performance Reconfigurable Computers (HPRC),” SPIE International Symposium ITCom 2001, Denver, Colorado, August 19-24, 2001.
Peterson, G.D. and M.C. Smith, “Programming High Performance Reconfigurable Computers,” International Conference on Advances in Infrastructure for Electronic Business, Science, and Education on the Internet (SSGRR’01), Rome, Italy, August 6-11, 2001.
Smith, M.C., S.L. Drager, Lt. L. Pochet, and G.D. Peterson, “High Performance Reconfigurable Computing Systems,” Proceedings of 2001 IEEE Midwest Symposium on Circuits and Systems, Fairborn, Ohio, August 14-17, 2001.
Nilsson, P., J. Barrette, W. Bryan, Z. Fraenkel, V. Green, S. Garpman, H.A. Gustafsson, U.Jagadish, L. Nikkinen, R. Lacey, J. Lauret, et. al., M.C. Smith, et. al., “The Pixel Readout System for the PHENIX Pad Chambers,” XIV International Conference on Ultra-relativistic Nucleus- Nucleus collisions, Torino, Italy, May 10-15, 1999.
Vann, J.M., M.C. Smith, C.E. Thomas, M.L. Simpson, M.J. Paulus, J.A. Moore, L.R. Baylor, and J.M. Rochelle, “Modeling and Simulation of Weak Inversion Current Sources for Control of Amorphous Diamond Electron Emitters,” Proceeding of the 1998 Midwest Symposium on Circuits and Systems, Notre Dame, Indiana, August 9-12, 1998.
Britton Jr., C.L., W.L. Bryan, M.S. Emery, S.S. Frank, M.N. Ericson, U. Jagadish, J.A. Moore, M.L. Simpson, M.C. Smith, A.L. Wintenberg, G.R. Young, et. al., “Mixed Signal Custom Integrated Circuit Development for Physics Instrumentation,” International Symposium on Optical Science, Engineering, and Instrumentation, San Diego, California July 19-24, 1998.
Emery, M.S., M.N. Ericson, C.L. Britton, Jr., M.C. Smith, S.S. Frank, G.R. Young, M.D. Allen, and L.G. Clonts, “Timing and Control Requirements for a 32-Channel AMU-ADC ASIC for the PHENIX Detector,” Conference record of the 1997 Nuclear Science Symposium, Albuquerque, New Mexico, November 9-15, 1997.